| 1. |
許重傑, "Synopsys Sentaurus TCAD模擬軟體之安裝與其透過遠端連線執行方式之研究," 建國科大學報, Jan, 2018. |
| 2. |
許重傑, "超大型積體電路技術實習課程學習成效評估之研究," 科技與工程教育學刊, ISSN: 10257578, Mar, 2015. |
| 3. |
Chorng-Jye Sheu, "New Compact and Time-Efficient Reliability Physics Model for p-Type Metal–Oxide–Semiconductor Field-Effect Transistors," Japanese Journal of Applied Physics, Nov, 2010. |
| 4. |
Chorng-Jye Sheu, "Electron Substrate and Gate Current Modeling for Single-Drain Buried-Channel p-Type Metal-Oxide-Semiconductor-Field-Effect-Transistors Including Tunneling Mechanisms," Japanese Journal of Applied Physics, Nov, 2008. |
| 5. |
Chorng-Jye Sheu, "Compact Hot-Electron Induced Oxide Trapping Charge and Post-Stress Drain Current Modeling for Buried-Channel pMOSFETs," Japanese Journal of Applied Physics, Aug, 2008. |
| 6. |
Chorng-Jye Sheu, "Study of the Characteristics of Contrast Ratio and Response time for Small Size a-Si TFT LCDs," Journal of Chienkuo Technology University, Oct, 2007. |
| 7. |
Chorng-Jye Sheu*, Sheng-Lyang Jang, "Modeling of electron gate current and post-stress drain current of p-type silicon-on-insulator MOSFETs," Solid-State Electronics, Apr, 2003. |
| 8. |
Chorng-Jye Sheu, Sheng-Lyang Jang *, "A MOSFET gate current model with the direct tunneling mechanism," Solid-State Electronics, Oct, 2000. |
| 9. |
Chorng-Jye Sheu, Sheng-Lyang Jang *, "A physics-based electron gate current model for fully depleted SOI MOSFETs," Solid-State Electronics, Oct, 2000. |
| 10. |
Sheng-Lyang Jang *, Chorng-Jye Sheu, Chorng-Bin Twu, "A compact drain-current model for stacked-gate flash memory cells," Solid-State Electronics, Aug, 2000. |
| 11. |
Sheng-Lyang Jang *, Chorng-Jye Sheu, "A non-local gate current and oxide trapping charge generation model for lightly doped drain and single-drain nMOSFETs," Solid-State Electronics, Jul, 2000. |
| 12. |
Chwan-Gwo Chyau, Sheng-Lyang Jang*, Chorng-Jye Sheu, "A physics-based short-channel SOI MOSFET model for fully-depleted single drain and LDD devices," Solid-State Electronics, Mar, 2000. |
| 13. |
Sheng-Lyang Jang*, Chwan-Gwo Chyau, Chorng-Jye Sheu, "Complete Deep-Submicron Metal-Oxide-Semiconductor Field-Effect-Transistor Drain Current Model Including Quantum Mechanical Effects," Japanese Journal of Applied Physics, Jan, 1999. |
| 14. |
Sheng-Lyang Jang*, Shau-Shen Liu, and Chorng-Jye Sheu, "A Compact LDD MOSFET Model Based on Nonpinned Surface Potential," IEEE TRANSACTIONS ON ELECTRON DEVICES, Dec, 1998. |
| 15. |
SHENG-LYANG JANG*, TZ-HUA TANG, YOUNG-SHYING CHEN and CHORNG-JYE SHEU, "MODELING OF HOT-CARRIER STRESSED CHARACTERISTICS OF SUBMICROMETER pMOSFETs," Solid-State Elecrronics, Jul, 1996. |
